| 摘要 |
PURPOSE:To facilitate the adverse read-out of the written data by providing a counter in addition to an address counter and using said counter as a counter for address increasing orders. CONSTITUTION:The output signal B of an address counter 2 is supplied to a memory 3, and the addresses are selected in their increasing direction and then written. When the count value of the counter 2 reaches the prescribed value, a flag signal F is inverted to a read-out mode from a writing mode by a control pulse P. The pulse P is supplied to a counter 4, and the counter 4 is subtracted by a writing pulse W. At the same time, the pulse P is supplied to a set terminal S via an OR circuit 5, and therefore the output signal A of the counter 4 is set to the counter 2. Thus the value of the counter 2 is changed and supplied to the memory 3. As a result, the address preceding the final writing position by an address is selected as a read-out start address. Then the data D in the memory 3 are read out in the reverse order to the writing mode. |
