发明名称 DATA LOGGING SYSTEM
摘要 PURPOSE:To reduce the overhead of software and make it possible that a processor performs the retry operation immediately, by performing automatically data logging in a direct memory access control part when an error occurs. CONSTITUTION:Start addresses for gathering logging data corresponding to respective error factors are stored preliminarily in registers DR1-DRn by a microprocessor MPU. When an error occurs, the MPU makes a data bus DB, an address bus AB, a write indication signal WR, etc. ineffective. Simultaneously, one of registers DR1-DRn selected by the error factor and contents of an indicating register ADR are transmitted as data and an address respectively to the bus AB. Thereafter, the write indication signal WR is transmitted by the timing from a sequence control circuit SQC. Thus, when data write to a direct memory access control part DMAC is terminated, a transfer request DRQ is generated from the circuit SQC to start the direct memory access control part DMAC.
申请公布号 JPS59106060(A) 申请公布日期 1984.06.19
申请号 JP19820216472 申请日期 1982.12.10
申请人 FUJITSU KK 发明人 GOUHARA MASAO
分类号 G06F11/34;G06F11/14 主分类号 G06F11/34
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