| 摘要 |
<p>PURPOSE:To improve the use efficiency of a memory capacity and the processing efficiency, by constituting a memory with a half word as a unit length and designating two continuous addresses optionally to remove restrictions on arrangement of the memory. CONSTITUTION:When a read instruction is given to a CPU, a memory 9 is addressed through a CPU register 2, an address control circuit 5, adders 6 and 7, etc. That is, address 0 (lower byte 9b) and address 1 (upper byte 9a) are designated when an even address is the upper address, and address 1 (9a) and address 2 (9b) are designated when an odd address is the upper address. A swapping circuit 13 reads out data and exchanges or does not exchange upper and lower bytes in accordance with the least significant bit and outputs data to a data bus control circuit 3 through a gate circuit 14. In case of write, the similar processing is performed. Thus, the memory is constituted with a byte unit (1/2 word) as a unit length to improve the use efficiency of the memory capacity and the processing efficiency.</p> |
