发明名称 PROTECTION OF A MISFET OF A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 Protection circuitry is provided to protect a MISFET, particularly a short-channel MISFET, from the punch-through phenomenon. To protect a MISFET QE1 a protection circuit having a gate controlled diode GCD is connected to provide a by-pass path for excessive voltage charges which would otherwise pass from a high voltage power supply terminal VDD to the drain of the MISFET QE1. GCD has a breakdown voltage, set by applying a predetermined gate voltage Vg to a gate thereof, less than a punch-through voltage of the MISFET QE1. When an excessive voltage is applied which would otherwise cause a punch-through phenomenon in QE1, CGD breaks down first to provide a by-pass charge path and thus protect the MISFET QE1.
申请公布号 DE3163450(D1) 申请公布日期 1984.06.14
申请号 DE19813163450 申请日期 1981.02.20
申请人 FUJITSU LIMITED 发明人 WADA, KUNIHIKO
分类号 H03F1/52;H01L27/02;H01L27/06;H01L29/78;H02H7/20;H03F1/42;(IPC1-7):H01L23/56 主分类号 H03F1/52
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