| 摘要 |
PURPOSE:To reduce the memory capacity that is used for storage of programs by converting plural word length instruction into a table form and providing such a specific instruction that refers to said table to control selectively the address of a memory. CONSTITUTION:For data processing, the outputs of a sequence counter 13 and an instruction register 14 are selected by a selecting/qualifying circuit 12 as the address designating information of a memory 10 and stored in an address register 11. Then a specific instruction is discriminated by an instruction decoder 15. In this case, the output of the register 14 is selected and the address of the memory 10 is designated via the register 11. Then an instruction table is read out and stored in the register 14, and this stored instruction is decoded by a decoder 15 to produce a control signal. Based on this control signal, the data processing is carried out. The circuit 12 can also qualify the address designation value of the memory 10 through the register 11, and different addresses are designated between the read-out of memory done immediately after discrimination of the specific instruction and the subsequent read-out of memory. Thus it is possible to read out the instructions of plural word lengths. |
