发明名称 MEMORY DEVICE
摘要 PURPOSE:To eliminate the intervention of a central processor and to improve the accessing efficiency by storing the capacity exceeding the word constituting bit number of a 2-dimensional addressing memory to a region designated by an extension address with an extension mode designation. CONSTITUTION:A memory access/sequence control part 11 drives a Z address control part 21 in case an extension mode is designated. The part 21 compares the value of the extension address stored in a register 16 with the value of a Z address register counter having a partial up-down counting function of a register 18 when an access is over. When no coincidence is obtained through said comparison, +1 is given repetitively to the Z address register counter until the coincidence is obtained. The part 11 controls a register control part 12 when a data word is over, and the accessing address is renewed.
申请公布号 JPS59100971(A) 申请公布日期 1984.06.11
申请号 JP19820210162 申请日期 1982.11.30
申请人 FUJITSU KK 发明人 OKAMOTO SHIGEKI
分类号 G06T1/60;G06F17/00;(IPC1-7):06F15/20 主分类号 G06T1/60
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