摘要 |
PURPOSE:To perform effective data transmission by operating a serial input/ output control part in interruption operation mode during data reception or operating in DMA mode during data transmission in a binary synchronous communication system. CONSTITUTION:The binary synchronous communication system is unable to estimate data length during reception, so an interruption system is employed. When data is received from a communication circuit, the serial input/output control part 30 generates an interruption signal INT. Consequently, a CPU10 reads received data RXDA to process plural received data from a multistage receiving buffer 35. A DMA system is utilized for transmission. Transmit data TXDA is transmitted according to a DMAC40 without the intervention of the CPU10. Consequently, there is no limitation of interruption delay during transmission, and effective data transmission is performed by the multistage receiving buffer during reception. |