发明名称 METHOD FOR ADJUSTMENT OF RESISTANCE VALUE FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To perform an adjustment of resistance value simply and continuously by a method wherein the fact that the activation rate of a high density impurity ion implanted into poly Si depends on annealing temperature is utilized. CONSTITUTION:Poly Si is formed into the density of 1X10<15>piece/cm<2> by implanting an As ion of 100keV, and when the above is annealed in an N2 atmosphere for 10min by changing temperature, the carrier activation rate is reduced rectilinearly in the annealing performed at the temperature below 600 deg.C. Also, when the density of 5X10<14>piece/cm<2> is obtained by implanting a B-ion of 60keV and an annealing is performed in an N2 atmosphere for 30min, the surface specific insulation resistance Ps changes suddenly at the temperature below 600 deg.C. As the isochrous annealing characteristics such as above-mentioned has a high degree of reproducibility, the prescribed rate of activation can be obtained by performing a strict temperature control. Accordingly, the resistance value of the poly Si wherein the prescribed quantity of impurities is implanted can be changed freely by controlling the annealing temperature.
申请公布号 JPS5999757(A) 申请公布日期 1984.06.08
申请号 JP19820209553 申请日期 1982.11.30
申请人 TOSHIBA KK 发明人 NISHIGUCHI SUSUMU
分类号 H01L27/04;H01L21/265;H01L21/324;H01L21/822 主分类号 H01L27/04
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