发明名称 MULTIPLE SIMULTANEOUS ACCESS MEMORY
摘要 <p>A multiple simultaneous access memory comprises two or more address control lines and input/output data lines for each bit of memory cell. It is accessed independently through an arbitrary address control line, and energizes the input/output data line corresponding to the address control line, thereby accessing the memory cell. </p>
申请公布号 WO1984002222(P1) 申请公布日期 1984.06.07
申请号 JP1983000418 申请日期 1983.11.24
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