发明名称 LINE INFORMATION COLLECTING SYSTEM
摘要 PURPOSE:To avoid excessive trace by stopping the storage of a control area to a logging area when an error bit is set so as to detect immediately the point of time of failure generation. CONSTITUTION:When an error is detected during the line processing and an error bit is set, an AND gate 18 is turned off and the write of logging area is stopped. In this case, an AND gate 17 is turned on and the address of the logging area is set to an address storage register 14. An interruption is generated from an interruption control circuit 10 to a control program 3 at the same time. The control program 3 reads the content of a logging address storage register 14, and the logging area is read from an address next to the address.
申请公布号 JPS5997255(A) 申请公布日期 1984.06.05
申请号 JP19820206966 申请日期 1982.11.26
申请人 FUJITSU KK 发明人 CHIBA HIDEAKI
分类号 H04L29/14;G06F11/07 主分类号 H04L29/14
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