Signal processor for plural frequency detection and tracking over predetermined range of frequencies

摘要

A signal processor circuit including a plurality of similar cascaded stages, each of which is capable of locking onto and tracking a different frequency of a multiple-frequency composite signal applied to the processor. Each of the stages may comprise a frequency locked loop plus a variable frequency stop, wherein the tuning of the variable frequency stop tracks the output of the frequency locked loop. The variable frequency stop circuit passes the non-locked components to the next similar stage which locks onto one of the remaining components.