发明名称 SIGNAL PROCESSOR
摘要 PURPOSE:To simplify the constitution and to attain high accuracy by utilizing a quadratic function obtained by two integrators and inverting a signal digitized by a nonlinear A/D converter into an analog signal. CONSTITUTION:Suppose that a counter 13 is a counter counting bits up to m(m-2<n>)-bit decided by the bit number (n) of an inputted digital signal, then the counter 13 loads a digital data D from an input terminal 12 at a time T1, the D is counted up to (m) in synchronizing with a clock pulse from a clock generating circuit 14 to output a pulse. An integrating gate switch 2 is turned on by a signal from a control circuit 11 at a time T2, an output of a reference constant voltage generator 1 is integrated by an integrator 5, and applied to an integrator 18. Then, the output of the integrator 18 is increased in the form of a quadratic function from a voltage 0V at the time T2, and stored in a sample holding circuit 9 by a counter load pulse loading the digital data at the time T2.
申请公布号 JPS5994919(A) 申请公布日期 1984.05.31
申请号 JP19820204097 申请日期 1982.11.19
申请人 MATSUSHITA DENKI SANGYO KK 发明人 FUJII KATSUYOSHI
分类号 H03M1/84;H03M1/58 主分类号 H03M1/84
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