| 摘要 |
PURPOSE:To achieve surely a fault detecting function by setting access timings of plural input/output processing parts in a desired order and performing the majority logic selection. CONSTITUTION:Each of input/output processing parts 4, 5, and 6 collate a set address signal of a measurer 17 and an address code outputted onto an address bus 13 with each other in an address detecting circuit 18; and if they coincide with each other, it outputs an input signal onto a data bus 14 from its own input processing part register 21. The circuit 18 monitors the address code sent on the address bus 13; and when an address signal is detected, and the circuit 18 generates the pulse, which resets its own detecting circuit, and detects a switching order signal indicating where the peculiarly determined set address of the setter 17 is sent after resetting of the address detecting circuit. Then, a CPU sets access timings of processing parts 4-6 in a prescribed order and performs the majority logic selection. |
