| 摘要 |
PURPOSE:To increase both the fluctuation margin of a power supply voltage and a working margin such as a process margin, etc. by delivering a timing signal set at a level smaller than the sum of the precharge level of a data line and the threshold voltage of an MOSFET when the storage information of a memory cell is read out to the data line. CONSTITUTION:The information is read out by connecting a capacitor Cs to a common data line DL after an MOSFETQm is turned on and then sensing the type of a change of the potential of the line DL that is caused in accordance with the charge quantity stored in the capacitor Cs. The size of a memory cell MC is reduced, and at the same time many memory cells are connected to the line DL to form a large capacity memory matrix with a high degree of integration. As a result, the Cs/Co value is greatly reduced between the capacitor Cs and the floating capacity Co of the line DL. Thus the capacitor Cd is set about half capacity value compared with the capacitor Co, and therefore the reference voltage is produced with a level about half that of the signal read out of the cell MC. |
