发明名称 |
INTEGRATED CIRCUIT DEVICE OF SEMICONDUCTOR MEMORY |
摘要 |
PURPOSE:To exclude the extra IC and single element and to improve the packing density of a memory by providing a power supply back-up circuit within a chip to back up a main power supply when it is cut off. CONSTITUTION:An IC memory chip 21 contains a switch circuit 2 which performs a switch between a main power supply and a battery power supply in addition to a memory 4. A power supply cut-off detecting circuit 1, a memory activation control circuit 3 and a battery power source VB of a back-up circuit are provided outside. The power supply VB is added by any one of connection to outside, lamination on the same chip 8 or incorporation into the same package. Thus it is possible to hold the memory information despite the cut-off of the power supply without adding a power supply back-up circuit to the outside of an IC device. An activating signal 122 of the memory in this example can vary the number of logic stages in accordance with a positive logic state or a negative logic state. |
申请公布号 |
JPS5992491(A) |
申请公布日期 |
1984.05.28 |
申请号 |
JP19820202365 |
申请日期 |
1982.11.18 |
申请人 |
HITACHI SEISAKUSHO KK |
发明人 |
SASAKI TOSHIO;MINATO OSAMU;KOMORIYA TAKESHI;MASUHARA TOSHIAKI;MIYAUCHI KATSUMI |
分类号 |
G11C11/413;G11C11/34;G11C11/401;G11C11/407;(IPC1-7):11C11/34 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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