摘要 |
PURPOSE:To attain ease of miniaturization of the circuit and LSI formation and to reduce the harmonic distortion by controlling the amplitude of an output of a primary circuit network consisting of C, R inserted to a feedback circuit of a summing amplifier to eliminate the need for a tapped delay line. CONSTITUTION:The titled equalizer consists of a signal input terminal 1, a signal output terminal 2, the summing amplifier 5, a discriminating section 7, and an operating section 10, the operating section 10 performs matrix operation, and when an optimum tap coefficient is decided, the primary circuit network comprising the C and R-R/m is inserted to a feedback circuit of the amplifier 5. Since the amplitude of the circuit network output is controlled and the automatic equalization is attained by feeding back the output after the control to an input of the amplifier 5, no tapped delay line is required, the miniaturization of the circuit and the LSI formation are attained easily, the dynamic range is made broader, the harmonic distortion is reduced, the power consumption is decreased and the high speed processing is attained easily. |