| 摘要 |
<p>The invention relates to a multi-microcomputer for image processing, with a bus (BG) wherein are connected in parallel slave microcomputers (PEi) between which the image memory is shared, a master microcomputer (PM) and a secondary master for input/output of images (PMS). This bus is overlaid with a star-configured supervision and control structure alternately centred on the master microcomputer and on the secondary master, comprising selection lines (SPi) to the information lines (STi) emanating from these microcomputers and bidirectional lines (AAi) for partitioning the image memory in one direction and for individual warnings in the other. The interrupt signals (INT1, INT2) sent on the bus and the selection signals (SPi) are obtained by decoding the segment addresses of the segmented processor PR. <IMAGE></p> |
