发明名称 |
Gate turn-off thyristor with selective anode penetrating shorts |
摘要 |
A gate turn-off thyristor of a short-circuited emitter configuration comprises a semiconductor substrate of a PE-NB-PB-NE four-layer structure, wherein a PE-layer is short-circuited through a NB-layer and an anode. The NB-layer includes heavily doped regions to which the anode is ohmic contacted with a low resistance. The PE-layer is provided at a location at least covered by a projection of the NE-layer. The thickness of the heavily doped regions is greater than that of the PE-layer. The improved structure assures satisfactory gate turn-off characteristics, although the semiconductor substrate is not doped with a life time killer impurity.
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申请公布号 |
US4450467(A) |
申请公布日期 |
1984.05.22 |
申请号 |
US19810273035 |
申请日期 |
1981.06.12 |
申请人 |
HITACHI, LTD. |
发明人 |
NAGANO, TAKAHIRO;SANPEI, ISAMU;SAKURADA, SHUROKU;NAKAGAWA, MASARU |
分类号 |
H01L21/332;H01L29/08;H01L29/74;H01L29/744;(IPC1-7):H01L29/74 |
主分类号 |
H01L21/332 |
代理机构 |
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主权项 |
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地址 |
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