| 摘要 |
PURPOSE:To correct one bit error and reduce the probability of causing a serious obstacle remarkably by adding one-bit error correction and two-bit error detecting circuit. CONSTITUTION:A selector circuit 30 generates a chip select signal of superior byte RAM group 10A, inferior byte RAM group 10B by an address signal outputted from a microprocessor not shown in the figure. The RAM selected by the chip select signal selects a cell in the chip by the address signal outputted by the microprocessor. Reading or writing of data for selected cell is executed by a command signal. If one-bit error is generated when reading of data is executed, data corrected by a superior byte SEC-DED circuit 20A or an inferior byte SEC- DED circuit 20B are outputted to the microprocessor. At the same time, the corrected data are written in the erroneous cell. |
