| 摘要 |
PURPOSE:To reduce the settling time to a balanced position to a large extent, by securing high speed response at small time constant from the time when a measuring lever is returned to the balanced position to the time until a preset period is elapsed, switching the time constant to a large value after the returning, thereby obtaining low speed response. CONSTITUTION:Upper and lower limit reference voltages VH and VL are set in a window comparator 21, and the magnitude of displacement signals S1 and S1' are judged. At the transient period directly after the setting, the output signal S1' becomes larger than the voltage VH. An output signal S3 becomes an H level. A triggerable timer 22 is locked and moved to an inverted state. An H level output signal S4 is outputted. An analog switch 20 becomes a conductive state, and current control of a balance coil 5 is performed at high response. Even though a balanced position is approached and the value becomes lower than the voltage VH, the timer 22 is triggered, and the H level signal S4 is continuously outputted until a metastable period alpha is elapsed. When the metastable period alpha has elapsed, the output level S4 is inverted into the L level, and the switch 20 is moved to a cut out state. The time constant of an integrating circuit 17 becomes large, and the stabilization due to low speed response is realized. |
