发明名称 DOUBLE BALANCING CIRCUIT
摘要 PURPOSE:To ensure the stable working of a double balancing circuit despite of the drop of power supply voltage and to reduce the noise by dividing the collector voltage of a transistor constituting a current mirror circuit into a prescribed level and using these divided voltages to the base bias of a differential paired transistors. CONSTITUTION:A resistance R10 is put between the collector of a transistor TRQ2 and the anode of a diode D1. The collector voltage of a TRQ2 is divided at the middle point of the joint between the R10 and the anode of the D1. If the power supply voltage VCC drops, the collector current of the TRQ2 is reduced. Thus the potential VB drops for the anode of the D1. In such a way sudden saturation of a differential pair TRQ11 and Q12 is prevented. As a result, the overall gain drop is gently decreased to ensure the stable working of a double balancing circuit even in a pressure reduction environment.
申请公布号 JPS5985574(A) 申请公布日期 1984.05.17
申请号 JP19820195577 申请日期 1982.11.08
申请人 TOSHIBA KK 发明人 SUZUKI TSUNEO
分类号 H03C1/54;G06G7/16;G06G7/163;H03D1/22;H03D3/06;H03F3/45;H03K17/62;H04H40/45 主分类号 H03C1/54
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