发明名称 OUTPUT CIRCUIT IN MOS INTEGRATED CIRCUIT
摘要 PURPOSE:To connect directly an ECL circuit to an MOS integrated circuit by controlling an output bipolar transistor(TR) by a potential of an output node of a level converting circuit. CONSTITUTION:When an output control signal (c) goes to H level at data readout, an output signal of an NAND circuit 1a is brought into H level and an output signal of an NAND circuit 1b is brought into L level with a sense output d0 set to L level, an MOSFETQ6 is turned on and an MOSFETQ4 is turned off. Thus, a node A is brought into a level close to a power supply voltage Vcc, a TRQ1 is turned on firmly and an output Dout goes to a level of Vcc- 0.6V being lower by VBE. When the d0 is at H level, an output signal of the circuit 1a is brought into L level and an output signal of the circuit 1b is brought into H level. Thus, FETQ3, Q5 are turned on and Q6, Q4 are turned off, then the potential at the node A reaches around Vcc-1V and the output Vout reaches a level of Vcc-1.6V.
申请公布号 JPS5985131(A) 申请公布日期 1984.05.17
申请号 JP19820194739 申请日期 1982.11.08
申请人 HITACHI SEISAKUSHO KK 发明人 TANIMURA NOBUROU
分类号 G11C11/419;H03K19/0175;H03K19/0944 主分类号 G11C11/419
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