发明名称 CIRCUIT FOR PREVENTING BREAKDOWN OF INTEGRATED CIRCUIT
摘要 PURPOSE:To avoid the breakdown of an IC at the time of abnormal bias when a power source is OFF, etc. even if the capacitance of a ripple removing capacitor in a power source circuit is reduced by mounting a diode outside between an external terminal and an external power source terminal. CONSTITUTION:The mount-out diode D1 whose anode is connected to the external terminal 9 of the IC3 and cathode to the external power source terminal 10 is connected. Thereby, even if such a discharge time of the terminal 9 and that of the terminal 10 that the potential of the terminal 9 becomes higher than that of the terminal 10 are set at the time of the OFF-state of the power source, a current flows from the terminal 9 to the terminal 10 through the diode D1, and thus the mask breakdown of the IC3 can be prevented. Thereby, it becomes unnecessary to increase the capacitance of the electrolytic capacitor C4 in the power source circuit, in order to set long the discharge time of the potential of the terminal 10; therefore the cost becomes low.
申请公布号 JPS5984454(A) 申请公布日期 1984.05.16
申请号 JP19820194869 申请日期 1982.11.06
申请人 TOSHIBA KK 发明人 NODA KOUJI
分类号 H01L27/04;H01L21/822;H01L23/58;H02H9/04 主分类号 H01L27/04
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