| 摘要 |
<p>A simple processor is used as a copying unit which transfers data between memories on a memory bus. The connection between the bus and each processor is established by the memories and a local bus. - The memory bus is operated at a low frequency and in sync. with the processors. The memory bus utilises the memories during those time intervals when the processors are not using them and they are incremented by address counters from a clock pulse generator synchronised from the copying processor. The memories of are refreshed without loading the processors or the central unit. The data transfer between the memories is effected in serial form. DEAB- DE3123382 C The multiprocessor system has data transferred between the processors (3.1-3.N). The transmitted data is stored in special memories (2.1-2.N) and the system has a copying unit for the transmitted data. The copy memory is organised with a write block assigned to each of the special memories, such that copies are simultaneously produced. - The transmission of the written blocks can occur during the period that no changes occur in the addresses and the copying process can take place slowly.</p> |
