| 摘要 |
PURPOSE:To facilitate an easy debugging by providing an action simulating means which delivers a signal containing a prescribed error and a means which displays the state of each signal, to a probe connected to an IC socket for transmission/reception of serial data. CONSTITUTION:A CPU14 is connected to an I/O interface 23, an ROM17 and an RAM16 respectively via a bus line 22 and furthermore to a USART24 for transmission/reception of serial data via a buffer latch 25. An ICE probe 12 has an input/output pin equal to a USART socket 26 of a target system T and connected via a flat cable 13 and buffs and latches the transmission/reception signals with the CPU14. When the program of the system T is traced, the USART24 is basically used as it is. Then signals excepting transmission/reception signal TX and PX are inputted and outputted via the CPU14. In such a way, various types of signals containing the prescribed error are delivered. Thus an easy debugging is possible for a program for error processing. |
