| 摘要 |
PURPOSE:To facilitate an easy loop test of a communication circuit and to simulate the faulty state of the circuit by providing the 2nd circuit control circuit for loop test in addition to the 1st circuit control circuit and furthermore putting a delay circuit between both control circuits. CONSTITUTION:A microprocessor 7 works on the program of an ROM8, and the data necessary for execution of program is stored in the RAM9 together with the data produced during execution of program. Channel interfaces 10 and 11 give interface to a channel (CH) A and B (circuit control circuit). The CHB has no actuation with the normal transmission, and selector 14a is connected to a terminal A. While the processor 7 controls a circuit via the CHA and an MODEM interface 15. The selector 14a is connected to a terminal B during a loop test. The output data of the CHA is delayed by a shift register 13a to undergo processing at the CHB and then delayed by a shift register 13b to be fed to the CHA. A control code table for CHB is changed by a program to perform an optional simulation. |
