发明名称 SIGNAL INTERPOLATING METHOD OF DECODING CIRCUIT OF DPCM-CODED SIGNAL PROCESSING CIRCUIT
摘要 PURPOSE:To perform excellent DPCM encoding with the minimum usage of memory by chopping a component of a differential analog signal in every decoding period at plural points by a chop control signal, and performing integration plural times in every decoding period. CONSTITUTION:A differential digital signal outputted from a digital processing circuit 4 is converted by a D/A converting element 7 into a differential analog signal, which is sent to a gate 10 consisting of an analog switch. An interpolating pulse generating circuit 9, on the other hand, generates an interpolating pulse signal on the basis of a clock signal from a master clock circuit 5 so that two pulse signals are positioned at a stable intermediate part in a signal in one stepwise decoding period of the differential analog signal, thereby outputting it to the gate 10 as the chop control signal. When the chop control signal with a high level is applied to the gate 10, the gate 10 extracts the intermediate part of the differential analog signal in each period as a difference signal with a quantization level intermittently twice each and sends it to an integrator 8.
申请公布号 JPS5981918(A) 申请公布日期 1984.05.11
申请号 JP19820193046 申请日期 1982.11.02
申请人 RIKOO TOKEI KK 发明人 KAMIYA KENJI;SHIAKU YOSHIYUKI
分类号 H03M3/04;H04B14/06 主分类号 H03M3/04
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