发明名称 Process for the manufacture of an integrated logic structure programmed according to a fixed preestablished configuration
摘要 The process of the invention comprises the stages of creation of two superposed sheets of strips on a common substrate 1, one consisting of conductive strips 41-42, the other of oxide strips 61'-63' of variable thickness; a stage of deposition to cover the structure thus created with a layer 3 of oxygen ion-conductive solid electrolyte, and a stage of reduction of the oxide through the solid electrolyte for a sufficient time to reduce entirely the thinnest regions of the oxide strips, creating electrical contacts in these regions with the underlying conductors and allowing the oxide to remain in the other regions 6210, 6310, 6320, insulating the second sheet from the underlying sheet, so as to create the preestablished configuration. <IMAGE>
申请公布号 FR2535887(A1) 申请公布日期 1984.05.11
申请号 FR19820018500 申请日期 1982.11.04
申请人 THOMSON CSF 发明人 MICHEL CROSET ET LOUIS MERCANDALLI
分类号 H01L23/525;(IPC1-7):11C17/00;03K19/173;01L21/95 主分类号 H01L23/525
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