| 摘要 |
PURPOSE:To obtain a simultaneous count circuit good in high counting rate characteristics and high in economical efficiency, by detecting the single output of a detector group by the timing output from an encoder based on the output of the detector group. CONSTITUTION:The encoder 4 corresponding to a detector group 2 does not generate encoding output when two sets or more of detectors 1 in the group 2 simultaneously outputs and an address 9 and a timing signal are outputted in response to the output of the single detector 1. This signal 5 is applied to a single simultaneous circuit 6 to be treated in an AND circuit corresponding to two input combinations and the treated signal does not respond to the simultaneous outputs of two sets or more of the detectors in the group while responds to the signal 5 of the single group 2 to generate a timing signal 7. In this case, by the output corresponding to the number of the group 2 through an encorder 8, the address of the detector 1 is supplied to a memory circuit 13 through the output circuit 11 corresponding to the group 2. By the constitution wherein only one simultaneous circuit is provided and the number of parts are reduced, a simultaneous count circuit high in counting rate characteristics and good in economical efficiency is obtained. |
