| 摘要 |
PURPOSE:To lighten the burden of a programmer and effectively perform program debug, by making an arrangement that address stop can be set even when a memory is in operation and a program can be continued properly when the operation is started again. CONSTITUTION:It is assumed that each of FFs 26 and 27 is set. A gate 24 is actuated and turned on and an operation clock from a clock generating circuit 25 is supplied to an address counter/register 21. Then the value of the address counter/register 21 is updated and the coincidence with a value set in a comparison register 22 is detected by a comparator 23 and the FF26 is set. Therefore, another gate is actuated and, as a result, the gate 24 is inactivated and closed and the clock supply is stopped, resulting in the stoppage of the operation. The operation can be restarted and continued properly when the FF26 is reset and the operation clock is supplied to the address counter/register 21 because the coincidence conditions is not realized. |
