发明名称 CONTROLLING SYSTEM FOR USING BUS
摘要 PURPOSE:To obtain an inexpensive, efficient controlling system of using bus with simple constitution by setting common bus using priority judging codes in which high priority erases low priority to each of plural master modules. CONSTITUTION:Eight master modules are connected to a common bus, and a signal from own bus using priority setting device 20 for each master module, NAND gates 40-1-40-8 for wired OR to which bus using control request signal G is inputted, and a bus using permission selecting device 30 for taking out a bus using permission signal H from one of controlling lines f-0-f-7 are connected to priority controlling lines f-0-f-7. A priority judging code corresponding to bus using priority is preset in the device 20, and a module that receives common bus using request outputs the code to the bus using controlling line, and a code of high using priority acts to erase low priority.
申请公布号 JPS5979331(A) 申请公布日期 1984.05.08
申请号 JP19820190064 申请日期 1982.10.29
申请人 FUJI DENKI SEIZO KK;FUJI FUAKOMU SEIGIYO KK 发明人 KOYAMA MINORU
分类号 G06F15/16;G06F13/374;G06F15/177 主分类号 G06F15/16
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