发明名称 LOGICAL GATE CIRCUIT
摘要 PURPOSE:To prevent a power supply line from the induction of noise and to prevent a logical circuit from the reduction of life by suppressing transient current completely at the time turning on power supply voltage. CONSTITUTION:When the power supply voltage VCC is less than the voltage VBEQ16 between the base and the emitter of a transistor (TR) 16, all TRs are disconnected and power supply current ICC does not flow. When the VCC rises and reaches the VBEQ16, base current is supplied to the TR 16 and the TR 16 is connected. Since the collector of a phase inversion TR is fixed on the voltage VCEQ16 between the collector and the emitter of the TR 16, a buffer circuit (consisting of TRS 11, 13) in the logical gate circuit is disconnected during the connection of the TR 16. When the VCC rises moreover up to the logical level of a logical gate circuit, and a buffer circuit is still continued to be disconnected even when TR 5, 9 are conducted. Consequently, transient current flowing through a resistor 12 and TRs 11, 13, 9 is not generated in the logical gate circuit as compared to an ordinary circuit.
申请公布号 JPS5979638(A) 申请公布日期 1984.05.08
申请号 JP19820188716 申请日期 1982.10.27
申请人 NIPPON DENKI KK 发明人 KIYOZUKA NOBORU
分类号 H03K19/088;H03K19/003 主分类号 H03K19/088
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