发明名称 MALFUNCTION RESTORING SYSTEM FOR PROCESSOR PROCESSING PROGRAM OF 2-SYSTEM
摘要 PURPOSE:To decide whether a program is returned to the head of other program or the processing is progressed by providing a check instruction on the way of the program and comparing the specific bit of the check instruction with a changeover signal. CONSTITUTION:If a processor malfunctions, in case a program selection signal XCHG is logic 1 and the processing of the program 2 is executed and a check instruction 3' comes, the output 6' of an exclusive OR circuit 4 goes to 1 because the XCHG goes to 1 and the least significant bit CB is 0 in the input of the circuit 4. Thus, an AND circuit 5 sends logic 1 to the output 7' of an OR circuit 6 because of the logic 1 of the output 4' of the check decode circuit 3 and of the output 7' of the OR circuit 6 to instruct jump. Then the program is jumped to the address of a ROM represented by the low-order 11 of a check instruction 3' and the program is restored to the processing routine of the program 1 by the instruction stored in the address.
申请公布号 JPS62115545(A) 申请公布日期 1987.05.27
申请号 JP19850255911 申请日期 1985.11.15
申请人 FUJITSU LTD 发明人 ITO AKIRA
分类号 G06F9/46;G06F11/00 主分类号 G06F9/46
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