Circuit arrangement for speed regulation of DC and universal motors

摘要

A circuit arrangement for controlling the speed of DC or universal motors (1) having a semiconductor switch (2) in the main circuit is described, in which a control circuit switches off the semiconductor switch in each case during an nth half-cycle or full-cycle and then measures the voltage generated by the motor, as a measure of the speed. Half-cycles are then selectively switched on or switched off as a function of this measurement so that the speed can be controlled by reducing or increasing the root-mean-square power supplied to the motor, without using a tachogenerator and without using a phase-gating controller. <IMAGE>