发明名称 FAST/SLOW ADJUSTMENT MECHANISM FOR ELECTRONIC TIME PIECE
摘要 PURPOSE:To enable users to adjust time easily so as to minimize advance and lag thereof by indicating the degree of adjustment in terms of day or month difference in an electronic digital time piece designed to adjust advance and lag in the time with an external control member. CONSTITUTION:When a mode button 44 is depressed, a shift is done from the state 41 of normally displaying date, day, hour, minute and second to the state 42 of correcting time. Under such a condition, time digit to correct is selected with a select button 45 and a correction is done with a set button 46. With the further depression of the mode button 44, a shift is done to the logic fast/slow adjustment state 43 to display the degree of adjustment 48 in the advance and lag. Under such a condition, the select button 45 is depressed, the adjusting degree in the advance and lag is selected and after the selection, the operation is completed by depressing the mode button 44.
申请公布号 JPS5977380(A) 申请公布日期 1984.05.02
申请号 JP19820188367 申请日期 1982.10.26
申请人 SUWA SEIKOSHA KK 发明人 OONISHI WATARU
分类号 G04G3/02;G04G3/00;H03K21/00;H03K21/40 主分类号 G04G3/02
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