| 摘要 |
PURPOSE:To reduce the writing test time by performing writing and reading at the required frequency for each address according to a writing pulse with the pulse width less than the prescribed one. CONSTITUTION:In an ultraviolet ray erasion type programmable read only memory with a floating gate/avalanche injection MOS structure, for example, when the prescribed writing pulse width is set at 50ms, a testing of writing is ferformed for each address with the pulse width shorter than 50ms: upon the completion of the writing, the testing is shifted to the subsequent address. When the writing with the shorter pulse is not satisfactory, writing operatins are performed several times and when the writing is completed until the total of writing pulse widths for each of addresses reaches 50ms, the product in problem is determined to be acceptable. This can reduce the testing time as compared with the method in which a writing test is performed for each address with the pulse width of 50ms. |
