发明名称 |
Video display system using serial/parallel acces memories. |
摘要 |
<p>A video display system employs a memory arrangement for the video data which is sequentially accessed for serial read-out of the bit-mapped video information at a high clock rate, and also randomly accessed in parallel by a microcomputer for generating and updating the information to be displayed. Parallel access to the memory by the microcomputer can occur while the serial video data is being clocked out, so microcomputer I/O and video output conflict only a very minimum amount. Dynamic MOS RAMs with a serial register added provide this dual port memory.</p> |
申请公布号 |
EP0107010(A2) |
申请公布日期 |
1984.05.02 |
申请号 |
EP19830109060 |
申请日期 |
1983.09.14 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
MCDONOUGH, KEVIN C.;LAFFITTE, DAVID S.;HUGHES, JOHN MARK |
分类号 |
G06F12/06;G06F12/00;G06F3/153;G06F12/04;G06F19/00;G06T1/60;G09G5/00;G09G5/02;G09G5/36;G09G5/377;G09G5/39;G09G5/393;G09G5/395;G11C7/00;G11C11/401 |
主分类号 |
G06F12/06 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|