发明名称 Digital interface for bi-directional communication between a computer and a peripheral device
摘要 For transmission of data from the computer to the peripheral, the computer initially clears a flipflop which provides a select signal to a multiplexer. When the computer is ready to provide data to the peripheral, it produces a data available signal or data strobe signal while the data is being provided to the interface. Setting of the flipflop causes a gate connected thereto to provide to the peripheral a signal indicating that the interface has data available for transmission thereto. In response thereto, the peripheral provides an acknowledge or strobe signal to transfer the data to the peripheral. This acknowledge signal is also provided to the gate to shut off the signal being provided to the peripheral. Setting of the flipflop also causes the multiplexer to change state so that it now can multiplex the acknowledge signal to the pulse generator. The pulse generator then resets the flipflop, so that it is now ready for transmission of more data from the computer to the peripheral. For transmission of data from the peripheral to the computer, the computer presents the initially cleared flipflop. The multiplexer can now multiplex to another pulse generator a data request signal from the peripheral indicating that the peripheral has data available for transmission to the computer. This signal and the signal produced by the present flipflop are provided to another gate which in response thereto provides an acknowledge signal to indicate that the interface is ready to receive such data from the peripheral and to strobe that data into the interface. The set flipflop also causes the multiplexer to multiplex to another pulse generator a received delayed version of the peripheral data request signal. This multiplexed signal causes the other pulse generator to reset the flipflop, thereby shutting off the acknowledge signal to the peripheral. Reset of the flipflop also permits the multiplexer to multiplex a data request signal from the computer, indicating that the computer is receiving the peripheral data from the interface, to the second pulse generator. The second pulse generator then toggles the flipflop to set. The interface is now ready to transmit more data from the peripheral to the computer.
申请公布号 US4446459(A) 申请公布日期 1984.05.01
申请号 US19810235472 申请日期 1981.02.18
申请人 NASA 发明人 BOND, HOLLIS H. JR.;FRANKLIN, CARL R.
分类号 G06F3/153;G06F13/42;(IPC1-7):H04Q9/00 主分类号 G06F3/153
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