| 摘要 |
PURPOSE:To make the delay time of an electric field signal extremely short and thus make it most appropriate for an operation circuit of an electronic computer by a method wherein the space distribution of heights of a potential barrier with a Fermi level as a reference is made heighest in the periphery and lowest at the center, when an FET which utilizes tunnel current is manufactured. CONSTITUTION:At the center of the surface of a source region 11 composed of an N<+> type GaAs whose electron density is set at approx. 5X10<17>/cm<3> by doping Si, a cylindrical plateau is formed by performing etching due to a low energy Ar ion beam. Next, a channel layer 13 of an Si doped N type Ga0.7Al0.3As, etc. of a thickness of approx. 100Angstrom and an electron density of approx. 1X10<15>/cm<3> is provided on the surface thereof, and a drain region 12 of the same composition as the region 11 is formed thereon. Thereafter, an Au-Ge/Ni/Au drain electrode 15 is provided on the region 12, and the side wall of the plateau is surrounded by a Ti gate electrode 14. Thus, the space distribution of Fermi levels 17 between the electrodes 14 is kept at the minimum at the center. |
