发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To facilitate an adjustment and to stable the working of a phase locked loop circuit, by using a loop amplifier of a phase locked oscillating circuit also as a reverse adder, transmitting a part of the output of the reverse adder through a BPF to apply it to an adder after reverse amplification and then constituting a search oscillation circuit in such a way. CONSTITUTION:The reverse amplification gain of a loop amplifier/adder 5 is decided by the ratio between resistors R5 and R7; while the gain of an adder is decided by the ratio between resistors R8 and R7. The output of the amplifier/adder 5 is transmitted through a BPF7 and amplified by a reverse amplifier for search oscillation to be applied to the adder 5. When the gain of this loop is set at >=1, the oscillation starts with the passing frequency of the BPF7. With synchronization of a phase locked circuit, a signal of an opposite phase to the adder 5 emerges at the output of an analog phase compensator 1. Then the gain of the adder 5 is reduced apparently, and therefore the oscillation is stopped.
申请公布号 JPS5974736(A) 申请公布日期 1984.04.27
申请号 JP19820185248 申请日期 1982.10.20
申请人 NIPPON DENKI KK 发明人 YAMAZAKI TOYOE
分类号 H03B5/26;H03L7/12 主分类号 H03B5/26
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