发明名称 DETECTING CIRCUIT OF SYNCHRONOUS SIGNAL
摘要 PURPOSE:To increase the detecting accuracy of a synchronizing signal, by detecting synchronizing signals of odd and even orders out of the parallel signals of odd and even orders obtained after demodulation of a 4-phase PSK signal. CONSTITUTION:The digital signal modulated by a 4-phase PSK system is demodulated and delivered in parallel to the signals of odd and even orders. Then these signals pass through an LPF2 and a waveform shaping circuit 3, and therefore synchronizing signals 9B and 9C of odd and even orders are delivered in parallel to each other. The signals are fetched into a shift register 22, and synchronizing signals are detected by synchronizing signal pattern detecting circuits 23 and 24 of odd and even orders respectively. Then the signal of ''1'' is fed to a double input AND gate 25 from each of the circuits 23 and 24, and a signal is delivered through a synchronizing signal detection output terminal to show the detection of a synchronizing signal of ''1''.
申请公布号 JPS5974757(A) 申请公布日期 1984.04.27
申请号 JP19820184514 申请日期 1982.10.22
申请人 HITACHI SEISAKUSHO KK 发明人 NISHIDA MASAMI;SHIBUYA TOSHIFUMI;NISHIMURA KEIZOU;AMADA NOBUTAKA
分类号 H04L27/22;G11B20/10;H04L7/08;H04L27/18;H04L27/227 主分类号 H04L27/22
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