发明名称 Input/output interrupt system.
摘要 <p>A data processing system includes a central processing unit (1), an input/output device (5) which requires an input/output interrupt, and a channel processing circuit (6) which responds to a request for input/output interrupt, propagates the request to the central processing unit, and reports the state of the input/output device to the central processing unit. The channel processing circuit comprises interrupt detecting means (20) which detects the request for input/output interrupt sent from the input/output device to the channel processing circuit, status information detecting means (7) which detects whether status information sent from the input/output device to the channel processing unit together with the request for input/output interrupt has a predetermined value, and counting means (8) which counts a predetermined constant time when the status information detecting means detects the predetermined value so that the request for input/output interrupt is sent to the central processing unit after the counting means has counted the constant time.</p>
申请公布号 EP0106498(A2) 申请公布日期 1984.04.25
申请号 EP19830305219 申请日期 1983.09.07
申请人 FUJITSU LIMITED 发明人 MATSUBARA, YOSHIAKI;TSURU, MASATO
分类号 G06F13/24;G06F9/46;G06F13/12;(IPC1-7):06F3/04 主分类号 G06F13/24
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