| 摘要 |
PURPOSE:To improve signal processing performance by connecting upper-stage IIL circuit groups and lower-stage circuit groups in series, and making threshold value voltages of output circuits of the upper-stage IIL circuit groups different from those of the lower-stage IIL circuit groups. CONSTITUTION:Five stages of ILL groups 101, 102, 103, 104, and 105 are cascaded. When the outputs of IILs are sent out, they are sent out through TTLOuBus (output buffer) for output buffers provided corresponding to the respective outputs. The numbers of connections of diodes D18-D27 in the output buffer TTLOuBus 1a-5a are made different to make respective inputs to the output buffer TTLOuBus 1a-5a different in threshold voltage. |
