发明名称 MULTIPLEX PROCESSOR TYPE CONTROL APPARATUS AND METHOD
摘要 The present invention is a designated master processor in a multiprocessor machine control providing for the selective reset of the processors of the system in response to a system abnormality or software crash. Separate reset circuitry is provided with the master processor to provide separate reset signals to each of the other processors. Upon detection of the particular processor undergoing the crash, the master processor selectively activates the reset circuitry for that particular processor.
申请公布号 JPS5972554(A) 申请公布日期 1984.04.24
申请号 JP19830169062 申请日期 1983.09.13
申请人 XEROX CORP 发明人 MAIKERU TARUMON DEUUGAN;JIYOOJI EDOWAADO BEIKAA
分类号 G05B19/042;G06F11/14;G06F15/16;G06F15/177 主分类号 G05B19/042
代理机构 代理人
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