发明名称 PROGRAM LOADING SYSTEM
摘要 PURPOSE:To erase the storage content with a simple constitution and to prevent erroneous erasure by controlling the erasure of the program instruction of a storage device and the load in response to the coincidence between input data and a prescribed data. CONSTITUTION:When the input data via an encoder 11 and a register 12 is coincident with a prescribed data such as data 00 not being the program data of a prescribed data generating circuit 20, a write control circuit 13 is controlled via a data comparison circuit 21, the data 00 is written in an address of a program data memory 16 accessed by an address generating circuit 15, and the data is erased substantially. Further, the circuit 21 transmits the input via the register 12 as it is as the program instruction when the comparison result is dissident, and this is loaded. Then, the storage content is erased with a simple constitution not requiring an erase switch and a memory clear control circuit and the erroneous erasure is prevented.
申请公布号 JPS5972689(A) 申请公布日期 1984.04.24
申请号 JP19820183261 申请日期 1982.10.19
申请人 PIONEER KK 发明人 INABA SHIZUO
分类号 G11B27/10;G06F9/445 主分类号 G11B27/10
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