| 摘要 |
PURPOSE:To increase packing density of LSI and reduce the chip size by a method wherein a submemory and a multiplexer are provided in a display signal processing circuit to transfer the measured data through a common bus line. CONSTITUTION:Counters 1-4 count an clock input 18 corresponding to an analogue amount and pass the counted values to memories 5-8 with a latch pulse 19 at the completion of A/D conversion to be stored therein. A multiplexer 22 connected to the memories 5-8 transfers the data in the respective memories to a display decoder 21 through a common bus line 28 in accordance with time sharing timing 27. The decoder 21 passes the data input in a time sharing manner to a common bus line 29 in synchronism with the time sharing timing 27 of the multiplexer 22, thus transferring the data to submemories 23-26 for rewriting data in accordance with the time sharing timing 27. Segment drivers 13-16 make mixing of the data stored in the submemories 23-26 with the display driving signal 27 to indicate the measured result on a display 17. |
