发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To make an FET for controlling input of inhibiting decoding action and wiring to the FET of a regular decoder unnecessary and make the area occupied by a regular decoder small by arranging so that when a spare memory cell is not selected, decoding is not performed and a regular memory cell is not selected. CONSTITUTION:A semiconductor memory device outputs address data Ai, -Ai for a regular decoder and address data Ai', -Ai' for a spare decoder separately from an address buffer circuit. When defective address is inputted to the spare decoder when the spare memory cell is selected, address buffer signals E, -E are outputted aside from the spare memory cell driving signal from the spare decoder, and address data Ai, -Ai for the regular decoder outputted by the address buffer circuit are controlled by address buffer controlling signals E, -E to make them same phase to each other. Accordingly, when the spare memory cell is not selected, the regular decoder selects the regular memory cell as usual. However, when the spare memory cell is selected, the regular memory cell is not selected.
申请公布号 JPS5971199(A) 申请公布日期 1984.04.21
申请号 JP19820180273 申请日期 1982.10.14
申请人 TOSHIBA KK 发明人 IWAHASHI HIROSHI
分类号 G11C11/401;G11C11/413;G11C29/00;G11C29/04 主分类号 G11C11/401
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