发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND ITS MANUFACTURE
摘要 PURPOSE:To complete isolation, etc. between the gate and gate of an I<2>L, to reduce the storage effect of a small number of carriers generated in a semiconductor layer, and to prevent an inter-layer leakage or a short circuit accident by burying a high concentration layer of the same conduction type as an element forming region to a part just under a dielectric layer and forming an impurity layer of a conduction type reverse to the high concentration layer to and in the vicinity of the circumferential side section of the region. CONSTITUTION:A BSG film 5 is deposited on the whole surface, the BSG film 5 is left selectively only around the I<2>L gate by using RIE technique, etc., and an N<+> impurity layer (the high concentration layer) 6 is formed to one part of the recessed bottom of the periphery of the I<2>L gate, a P<+> isolation layer 7 around a linear circuit and a P type diffusion layer (the impurity layer) 8 from the BSG layer 5 of the periphery of the I<2>L gate in succession. A thin thermal oxide film 10 is formed newly onto an epitaxial layer 3, and an insulating layer (the dielectric layer) 11 is left in the recessed section through etching by using decompression CVD or plasma CVD technique and RIE technique. The high concentration layer 6 and the P type impurity layer 8 are made to collide with an N<+> buried layer 2 through heat treatment.
申请公布号 JPS5969958(A) 申请公布日期 1984.04.20
申请号 JP19820180901 申请日期 1982.10.15
申请人 TOSHIBA KK 发明人 TAGUCHI MINORU
分类号 H01L21/76;H01L21/8226;H01L27/082 主分类号 H01L21/76
代理机构 代理人
主权项
地址