发明名称 DECODER OF PULSE COUNT MODULATION CODE
摘要 PURPOSE:To simplify the constitution of a device, to attain plural simultaneous communication of three subscribers or more and to obtain a highly efficient conference system by connecting PCM signal adders for two services to digital signal circuit parts on both the coder and decoder sides. CONSTITUTION:An analog voice signal from a transmission terminal 1 on the coder side is converted into a linear PCM signal by an A/D converter 7, the converted signal is added to a PCM signal received on the decoder side by adders 9, 8 and the added signals are temporally stored in registers 10, 11. The registers 10, 11 output pulses obtained by composing respective contents with one signal out of three-subscriber communication and the other signal respectively. At the prescribed time outputted from a timing circuit 12 in accordance with a decoder synchronizing signal 5, the outputs from the registers 10, 11 are successively outputted from a coder converting circuit 14. On the other hand, a PCM signal from an input terminal 4 on the decoder side is temporally stored in a register 16 or 17 through a code converting circuit 14, the outputs of the registers 16, 17 are added by an adder 18 at the prescribed time outputted from a timing circuit 15 and an analog signal converted by a D/A converter 19 is outputted to a receiving terminal 2.
申请公布号 JPS5970071(A) 申请公布日期 1984.04.20
申请号 JP19820178414 申请日期 1982.10.13
申请人 HITACHI SEISAKUSHO KK 发明人 SHIRASU HIROTOSHI;YAMAKIDO KAZUO
分类号 H04B14/04;H04M3/56 主分类号 H04B14/04
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