| 摘要 |
PURPOSE:To detect errors of S/P conversion and P/S conversion highly accurately by detecting the error in each shift clock with a simple circuit constitution. CONSTITUTION:Since an odd parity output is applied to even parity check at the reading of data, and to odd parity check at the writing of the data, the output of a parity generator 4 and a READ signal are inputted to an exclusive OR circuit 8. An output from an exclusive OR circuit 9 to which the output of the exclusive OR circuit 8 and the output of an FF12 are inputted is a real signal for error detection, and the output of an AND circuit 13 to which the output of the circuit 9 and a CHK2 signal are inputted is latched by an FF14. |
